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Tektronix Receiver Test Automation Software for PCIe 3.0, PCIe 4.0, PCIe 5.0, PCIe 6.0, PCIe PLL Bandwidth (Gen 3/4/5/6), USB4 (Gen 2/3 Legacy and Rounded) and USB4v2 Gen4 calibration and receiver tests (Compliance & Beyond Compliance)

The TekRxTest Automation Software supports PCIe 3.0 (CEM and Base), PCIe 4.0 (CEM and Base), PCIe 5.0 (CEM and Base), PCIe 6.0 (CEM and Base), PCIe PLL Bandwidth (Gen 3/4/5/6), USB4 (Gen 2/3 Legacy and Rounded) calibration, and USB4v2 Gen4 calibration and receiver tests (Compliance & Beyond Compliance).The PCIe calibration and tests are in accordance with PCI Express Base Specification Revision 6.2 and PCI Express Card Electromechanical Specification 0.7. The USB4 (Gen 2/3 Legacy and Rounded) calibration and tests are in accordance with the USB4 Electrical CTS Revision 1.02. The USB4v2 Gen4 calibration and tests are in accordance with the USB4 Version 2 Gen4 CTS Revision 0.9.The calibration procedure is done by connecting the output of the BERT PPG to the Real-time Oscilloscope through a specialized set of fixtures and cables. The BERT can be programmed to add different amounts of random jitter, sinusoidal jitter, differential and common mode interference along with variable signal amplitude, preshoot, and de-emphasis. These parameters are calibrated at two test points. The receiver tests are accomplished by connecting the output of the BERT PPG (which can produce specific test patterns) to the input of the DUT through the same set of fixtures and cables used during calibration.In the case of PCIe receiver tests, the output of the DUT is connected to the BERT error detector to identify bit errors on the DUT Tx traffic, either during loopback or during sweep of one of the stress parameters. Any error detected can be assumed to come from the DUT Tx path as a result of either the DUT experiencing a bad bit-decision at its receiver or uncompensated back-channel loss at the error detector of the BERT. Additionally, DUT Tx traffic can be analyzed to verify the DUT responsiveness to various requests put forward by the BERT during the link training process. The software includes Calibration and JTOL for PCIe 3.0/4.0/5.0/6.0 Base and Tx/Rx Link Equalization test for PCIe 3.0/4.0/5.0/6.0 CEM.In the case of PCIe PLL BW (Gen 3/4/5/6), the BERT can be programmed to add different amounts of sinusoidal jitter. Post calibration, the output of the DUT is connected to the Real-time Oscilloscope to measure the transmitter DUT‚s PLL bandwidth and peaking. In case of USB4 (Gen 2/3 Legacy and Rounded) and USB4v2 Gen4, post calibration, the output of the DUT is connected to the Wilder microcontroller to identify the bit errors on the DUT Tx traffic after preset negotiation is done using the ETT tool while sweeping one of the stress parameters.

該当製品： DPS77004SX, DPS75904SX, DPS75004SX, DPO73304SX, DPO73304DX

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