PPC403 Microprocessor Support
- Full speed state analysis up to 80 MHz
- Disassembly shows acquired data in the processor's instruction set mnemonics.
- Symbolically identifies all processor bus cycles
- Acquired data can be linked directly to HLL source files for source level debug
- 500 ps timing resolution enables detailed analysis of setup and hold times, edge-to-edge relationships, control timing, etc.
- All data acquired by the logic analyzer is time stamped to enable accurate time correlation of code execution to other system busses or hardware activity.
Engineers can design a probe interface directly into the system under test. This allows the greatest control of probe loading and provides the most mechanically robust connection. Tektronix recommends designing the P6434 probe connectors into prototype models. Third party breakout boards are also available, providing an alternative probing method.
Minimum System Requirements
- TLA7xx mainframe and one TLA7L3 acquisition module, 102 channels, 100 MHz state, 32K deep (200 MHz state, 136 channels and up to 64M deep available)
- Or TLA603 instrument, 102 channels, 100 MHz state, 32K deep (200 MHz state, 136 channels and up to 1M deep available)
- qty 3: P6434 high-density mictor probes (sold separately)
- TLA application software version 2.0 or greater
- Instrument setup software including clocking and channel assignments
- Symbol table of all bus cycle names
- Disassembler for PPC403GA, PPC403GC and PPC403GCX processors
- User manual
|device description||product number|
|add qty 3: P6434 high-density mictor probes||P6434|