TLA7000 Logic Analyzer
The modular TLA7000 Logic Analyzer Series provides the speed and flexibility you need to capture logic detail on today's fastest microprocessors and memory designs. Pinpoint the source of elusive errors and gain the visibility you want with large easy-to-read displays, fast data throughput, and time-correlated views of analog and digital signals through the same probe.
|MagniVu™ acquisition||Avoid missing events completely in either timing or state acquisition mode with higher sampling resolution (up to 20 ps) on all channels.|
|iCapture™ multiplexing||Eliminate double probing with simultaneous digital and analog acquisition through a single logic analyzer probe.|
|Flagging the glitch||Remove the need to manually search all channels using exclusive ability to show both the time and channel where the glitch occurred.|
|TS/TH violation triggering||Eliminate the time consuming and complex task of monitoring the circuit's outputs with real-time violation triggering that automatically acquires intermittent setup and hold violations.|
|iView™ display||Gain complete system visibility with time-correlated, integrated analog and digital data on one display.|
|iVerify™ analysis||Quickly find signal integrity issues with multi-channel bus analysis using oscilloscope-generated eye diagram.|
|Automated measurements||Easily summarize your design's performance with sophisticated measurements such as: frequency, period, pulse width, duty cycle, and edge count.|
|Drag & drop triggers||Quickly isolate events through simple and intuitive trigger setup. Triggers include: Channel Edge, Channel Value, Bus Value, Multi-Group Value, Glitch, Setup and Hold Violation, or Trigger on Anything.|
|Datasheet Link||Probe||Description||Configure and Quote|
|View Datasheet||P6910||34-Channel General Purpose Probe for TLA7000 Logic Analyzers; Single-Ended/Differential Clock & Data; Fits 0.100 in. square pin configurations; flying-leads, solder- in||Configure & Quote|
|View Datasheet||P6960||34-Channel D-Max Probe for TLA7000 Logic Analyzers; Single-Ended Data,Single-Ended/Differential Clock||Configure & Quote|
|View Datasheet||P6960DBL||34-Channel D-Max Probe for TLA7000 Logic Analyzers; Single-Ended Data,Single-Ended/Differential Clock; Two back-end connectors to the TLA logic analyzer module enables double probing of signals with a single probe head||Configure & Quote|
|View Datasheet||P6960HCD||34-Channel HCD Probe Cable for TLA7000 Analyzers; for DDR Applications; Single-Ended Data,Single-Ended/Differential Clock; Two back-end connectors to the TLA logic analyzer module enables double probing of signals||Configure & Quote|
|View Datasheet||P6960HS||34-Channel D-Max Probe for TLA7000 Logic Analyzers; For Higher Sensitivity Applications; Single-Ended Data,Single-Ended/Differential Clock||Configure & Quote|
|View Datasheet||P6962||34-Channel D-Max Probe for TLA7000 Logic Analyzers; Optimized for 2X Demux; Single-Ended Data,Single-Ended/Differential Clock||Configure & Quote|
|View Datasheet||P6962DBL||34-Channel D-Max Probe for TLA7000 Logic Analyzers; Single-Ended Data,Single-Ended/Differential Clock; Optimized for 2X Demux; Two back-end connectors to the TLA logic analyzer module enables double probing of signals with a single probe he||Contact Us|
|View Datasheet||P6962HCD||34-Channel HCD Probe Cable for TLA7000 Analyzers; for DDR Applications; Single-Ended Data,Single-Ended/Differential Clock; Four 2x Demux (half-channel) back-end connectors to the TLA logic analyzer module enables double probing of signals||Configure & Quote|
|View Datasheet||P6980||34-Channel D-Max Probe for TLA7000 Logic Analyzers; Single-Ended/Differential Data & Clock||Configure & Quote|
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|On the Bleeding Edge: Tektronix Logic Analyzers Enable Tundra Semiconductor to Develop First RapidIO Switches and Get to Market Faster Challenge: Design, verify and debug the industry’s first silicon switches supporting parallel and serial RapidIO. Solution: Tektronix TLA7000 Series logic analyzer with TMS805 RapidIO application support package that enables 800 MHz state acquisition with 1.25 Gb/s data rate, 125 ps timing resolution on all channels, real-time triggering of RapidIO symbols, packets and transactions and full view of logic, transport and physical layers.||Case Study|