Phase Reference Module for the DSA8300*1 Sampling Oscilloscope
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Features & Benefits

  • Extremely Low Jitter <200 fsRMS (typical)
  • Flexible Operation
    • Triggered
    • Untriggered (Free-running) Acquisition Without Trigger Signal
  • Support for Enhanced Acquisition Modes (FrameScan®)
  • Wide and Continuous Frequency Range 2 GHz - 60 GHz
  • Small Module Implementation Allows:
    • Acquisition on Six Other Channels
    • Placement Close to the DUT with Module Extender Cable
  • Fast Acquisition Rate


  • Design, Verification, and Manufacturing of Telecom and Datacom Components and Systems Operating at 10 Gb/s and Faster

Extremely Low Jitter, Flexible Signal Acquisition Solution

The 82A04 Phase Reference Module extends the capability of the DSA8300*1 digital serial analyzer sampling oscilloscope mainframe by providing extremely low jitter/drift sample position information to the mainframe. This sample position information is based on the phase of a clock the user provides to the 82A04 input.

The benefits of using the sample position information based on a clock signal are two-fold – an extremely low jitter of <200 fsRMS (typical), and the possibility of a triggerless acquisition. The typical application is the acquisition and analysis of very high-speed optical and electrical signals in high-speed communication devices and systems and similar areas.

The 82A04 together with the DSA8300 implements the phase reference time-base functionality in a novel way, giving the user the freedom to select from time base and acquisition modes without compromises; any phase-reference frequency within the operating range is accommodated, and even the advanced features, such as FrameScan®, remain available. The separate DSP per acquisition slot architecture of the DSA8300 enables the acquisition rate in the Phase Reference mode to reach over 40 kS/s*2.

*1 Also compatible with DSA8200, TDS/CSA8200 sampling oscilloscopes.

*2 Typical performance, some settings will lower the throughput.

Modes of Operation

The operation of the phase reference is based on the acquisition of a clock synchronous to the signal under observation. This clock can be a user-supplied signal (e.g. a clock from a BERT), or the clock output of one of the DSA8300 clock recovery or optical modules. In addition, the user can also provide a traditional external trigger signal either to the Direct Trigger input, or to the Trigger Prescaler input of the mainframe.

Phase Ref Free-Run - With no external trigger to the DSA8300 mainframe needed, the 82A04 module can, together with the mainframe, create a time base based on the phase of the reference clock (effectively the time base of the instrument functions as a “Phase-base” instead). The signal displayed on the screen will therefore repeat after one period of the reference clock. All user controls remain enabled, even while the horizontal position has relative meaning only. The timing information presented by the oscilloscope is based solely on the phase reference clock frequency as entered by the user in the Input Freq field of the Phase Reference Setup dialog.

Phase Ref Triggered - When the DSA8300 mainframe is supplied with both the reference clock and a traditional external trigger, the mainframe triggers on the trigger signal, and uses the phase reference information from the 82A04 to minimize the jitter. Otherwise the acquisition process doesn’t change from traditional acquisition, the signal remains referenced to the trigger point.

Characterize - To operate properly in either the Phase Ref Triggered or the Phase Ref Free-Run modes the Phase Reference module has to first characterize the phase reference signal. The signal needs to be stable during the characterization and afterward. The instrument indicates when characterization is necessary.

Performance You Can Count On

Depend on Tektronix to provide you with performance you can count on. In addition to industry-leading service and support, this product comes backed by a one-year warranty as standard.




Acquisition Modes

Free Run Synchronous, Triggered Synchronous

Mainframe Resources

Any one active*3 small (electrical) module slot. Both acquisition channels associated with the slot became unavailable. Only one 82A04 module can be activated in a mainframe at a time

Compatible Mainframes

DSA8300, DSA8200, CSA/TDS8200. Does not operate in the CSA/TDS8000 or 8000B mainframes

*3 Channels not displaced by a large (optical) module.

Reference Clock Parameters Supported





100 mVp-p - 1.8 Vp-p

Jitter performance guaranteed from 600 mVp-p - 1.8 Vp-p

Guaranteed Frequency Range

2 GHz - 25 GHz continuous; for non-sinewave reference clock signal in the 2 GHz - 8 GHz range an additional filter*4 typically is required


2 GHz - 60 GHz continuous with Option 60G; for non-sinewave reference clock signal in the 2 GHz - 8 GHz range an additional filter*4 typically is required

*4 See list of accessories at the end of this datasheet for recommended filters.

System Performance




System jitter of 200 fsRMS typical, on a 10 GHz or faster acquisition module, in DSA8300 mainframe, with f ≥8 GHz, VREF ≥0.6 V Phase Reference Signal


System jitter of 280 fsRMS typical, on a 10 GHz or faster acquisition module, in DSA8300 mainframe, with 2 GHz ≤ f <8 GHz, VREF ≥0.6 V Phase Reference Signal

Time Accuracy (Time Base) and Timing Deviation (Phase Reference)



Phase Reference Time Base (Triggered)

   Maximum timing deviation relative to phase reference signal

Horizontal position >40 ns after trigger event: 0.2% of phase reference signal period (typical)

Horizontal position ≤40 ns after trigger event: 0.4% of phase reference signal period (typical)

Phase Reference Time Base (Free Run)

   Maximum timing deviation relative to phase reference signal

0.1% or better of phase reference signal period (typical)




Input Impedance

50 Ω ±0.5 Ω AC (5 pF typical AC coupling)

1.85 mm female (‘V’) connector

Precision adapter to 2.92 mm female included with 50 Ω SMA termination


Matches the mainframe specifications.

Physical Characteristics



















Last Modified: 2011-08-22 05:00:00

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