Fully-automated High Voltage wafer-level testing

Fully-automated HV wafer-level testing

Fully-automated HV wafer-level testing

Increase throughput, reduce cost of test

Lower cost of test, higher throughput

Traditional test systems used for WLR, PCM, and Die-Sort do not have the measurement dynamic range or resolution to meet the new efficiency requirements (higher voltage, lower leakage current, lower on-resistance), or they require time-consuming manual reconfiguration to switch between low- and high-voltage tests. To meet your fab’s productivity goals, you can no longer afford to manually switch between two separate test systems for low voltage and high voltage testing. Only Keithley can perform fully automatic wafer-level tests up to 3kV in a single probe touchdown.

Move from high voltage to low voltage without changing test set up.

Perform all high- and low-voltage tests in a single pass without changing equipment or test setup. Get full 3kV sourcing capability combined with sub-pA measurement resolution, which eliminates the need to re-configure the test setup or use two separate test systems when moving from high voltage to low voltage breakdown tests. Minimize connectivity issues due to manual cabling and probing. Reduce false failures by ensuring high quality measurements. Safely rely on test results to adjust manufacturing process parameters to maximize yields.

breakdown voltage test

In this breakdown test, voltage is ramped up to 1800 V at two different ramp rates, 20 ms and 100 ms per step. High ramp rate (slow delay time) increased the measured current from 100 pA to 1 nA. At the higher ramp rate, most of the current is the displacement current (~ 1 nA.)

Measure capacitance without manual reconfiguration

Automate all Capacitance tests, including complex 3-terminal measurements. Fully automate 2- or 3-terminal transistor capacitance measurements to quickly evaluate switching characteristics such as speed, energy, and charge with Keithley’s high voltage switching matrix.

Perform transistor capacitance measurements
such as Ciss, Coss, and Crss up to 3 kV without manual reconfiguration of test pins

Fast automation

Minimize test times for fully automated wafer test

Sensitivity vs. typical execution time for connect-force-measure for different current levels.

Minimize test times, maximize test throughput and reduce cost of test with Keithley’s Test Script Processing (TSP) technology and virtual backplane (TSP-Link) that enables high-speed triggering, timing, and synchronization between all elements of the system.

Downloads
Download

Download Manuals, Datasheets, Software and more:

Go to top