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DDR5 Memory

Adoption of 5G is driving growth in a variety of exciting technologies – from augmented reality (AR) and artificial intelligence (AI) to cloud computing and IoT. All of these rely on more data being both stored and accessed more quickly, hence the importance of fifth generation memory (DDR5). DDR5 improves bandwidth, density and channel efficiency, but higher data transfer rates and faster signal speeds lead to complex designs that push the boundaries of signal integrity and require higher performance measurements for compliance, debugging and validation.

Memory Solutions


The TekExpress DDR5 Transmitter solution conforms to the JEDEC memory standard requirements so you can spend more time validating the memory design and less time collecting the data. DDR5 test automation software option is available on MSO / DPO70000 Mixed Signal Oscilloscopes and DPO70000SX ATI Performance Oscilloscopes.

Key Features:

  • DDR DFE standalone application
  • DFE analysis on the bursty DDR traffic and write data eye measurements
  • De-embedding with SDLA
  • Up to 8400M T/s in user defined mode

Learn More:

TekExpress DDR5 Transmitter datasheet

View DDR5 Brochure

DDR Memory Testing & DFE Analysis


The TekExpress LPDDR5 Transmitter solution meets the latest JEDEC memory standard requirements so you can confidently validate LPDDR5 DRAM designs at the maximum data rates. Supported on MSO / DPO70000 Mixed Signal Oscilloscopes and DPO70000SX ATI Performance Oscilloscopes.

Key Features:

  • Automated read and write burst separation
  • De-embedding techniques using SDLA
  • Faster times for a faster time to market
  • Multiple Burst Detection Method supported - Read and Write, Write Only, Read Only, and Visual Search
  • Hexagon shape mask and margin analysis for Write Data, CA, CS Eye measurement

Learn More:

LPDDR5 Transmitter datasheet

View LPDDR5 Brochure

DDR Memory

DDR/LPDDR, Generations 3 and 4

Fast data rates, flexibility and proven technology make previous generations of DDR4, LPDDR4, DDR3 and LPDDR3 DRAMs extremely common in wearables, medical and IoT applications.

DDR4/LPDDR4 and DDR3/LPDDR3 test automation software is available for use with MSO / DPO70000 Mixed Signal Oscilloscopes and DPO70000SX ATI Performance Oscilloscopes. DDR3/LPDDR3 automation software is also available for use with Tektronix 6 Series B MSO Mixed Signal Oscilloscopes.

Key Features:

  • Easy identification of reads and writes
  • Automated setup and testing per JEDEC specifications
  • Automated report generation
  • Support for a wide range of interposers and high-performance probes

Learn More:

DDR/LPDDR Gens 3 and 4 Testing on MSO/DPO70000 and DPO70000SX Oscilloscopes

DDR/LPDDR Gen 3 Testing on 6 Series MSO Oscilloscopes

DDR Memory Trigger and DDR3 Memory

Additional Memory Resources

DDR5 Characterization

DDR5 Memory Characterization Webinar

Learn about characterization and debug techniques for DDR5 SDRAM memory devices when you view this presentation.
DDR5 Memory Validation

DDR5 and UDA Mode

See how User-Defined Acquisition Mode allows users to influence every detail of their oscilloscope setup while working within the automation framework.
DDR5 Memory Validation

DDR5 Memory Validation and Debug

Read our white paper to learn how address implications of the improved performance DDR5 brings for analyzing and testing DDR5 enabled devices.

LPDDR5 Challenges and Solutions

Watch How to Solve Key LPDDR5 DRAM Test Challenges for test tips and techniques to meet the design challenges posed by this mobile memory standard.
DDR5 Read-Write Burst

Next Gen Memory Blog

Our blog describes how the new generation of memory, DDR5, pushes the limits of high-speed signaling and presents new testing challenges.
DDR5 Probing
Data Sheet

Flexible Probe Tips for DDR/LPDDR Applications

New solder-in tips for Tektronix P7700 Probes increase performance in signal acquisition for DDR and LPDDR electrical validation applications.