Serial Data Link Analysis (SDLA)
Acceleration of signaling frequencies and shrinking amplitude create challenges for testing Computer, Communications and Memory busses. Tektronix' advanced Serial Data Link Analysis solutions enable a seamless transition between characterization, compliance, and debug tasks required to bring your product to market.
- SDLA Visualizer for MSO/DPO70000 Series Real Time Oscilloscopes: the SDLA Visualizer enables complete measurement circuit de-embed, simulation circuit embed and receiver equalization. The SDLA Visualizer with DPOJET Jitter and Eye Analysis provide a comprehensive simulation and measurement environment for Computer, Communications and Memory buses.
- 80SJNB Jitter, Timing, and SDLA Visualizer Link Analysis for Sampling Oscilloscopes: When used with the Tektronix DSA8300 Sampling Oscilloscope, 80SJNB allows the user to specify a de-embed filter, Time Domain Waveform or S-Parameter for channel embedding using SDLA Visualizer and DFE/FFE Equalization. 80SJNB analysis software also performs timing and noise-based analysis to get a 3-D view of the eye diagram performance for deep, accurate evaluation on signals with speeds beyond 50GHz.
- SignalCorrect™ Software and TCS70902 Calibration Source for MSO/DPO70000 Series Real Time Oscilloscopes: SignalCorrect™ allows quick characterization of cables, fixtures and other types of interconnects using the TCS70902 Fast step source and the captured response on a MSO/DPO70000 scope. Based on this characterization, SignalCorrect can design a de-embed filter that compensates for the losses that occur in the interconnects, and offers a flat response, enabling signal margin recovery, leading to more accurate measurements.
|Equalization and Serial Data Link Analysis Methods (SDLA) with 80SJNB Advanced Application Note|
Describes the Equalization concept and SDLA methods using the 80SJNB.
|DesignCon 2015 Paper – Hybrid Modeled Measured Characterization of a 320 Gbit/s Backplane SystemThis paper explores a case study of a multilane Ethernet backplane 320 Gbit/s system that is difficult to fully measure and deembed, implements a hybrid method of modeling, deembedding, and measurement, explores improvements to the metrology and independent verification of results, and discusses the methodology both at 28Gb/s and 10Gb/s.|
|Correlation of Measurement and Simulation Results using IBIS-AMI Models on Measurement Instruments (DesignCon 2014)|
This paper will illustrate how measurement results using S-parameters and IBIS-AMI models correlate with simulation results on a SAS 12Gb/s server card, as compared to using reference equalizers in the measurement system.
|Validation & Analysis of Complex Serial Bus Link Models (DesignCon 2013)|
|Serial Data Link Analysis|
SDLA Visualizer software provides extensive capability for computing embed and de-embed filters for real-time measurement and simulation. This application note focuses on the embed and de-embed operations with measurement examples.
|Advanced Jitter and Noise Analysis||new webinar that covers advances in the popular DPOJET timing & jitter analysis toolset|
|How to Address Your Toughest Serial Bus Design Challenges with EDA and Measurement Correlation|
This Tektronix webinar will teach engineers how to use modeling tools to correlate simulations with high-speed physical layer measurements on Serial Bus Standards using the DPO/MSO70000 Series Oscilloscopes.
|Using SDLA Visualizer|
Learn how to open closed eyes using equalization techniques and how to de-embed reflections and loss caused by the measurement setup using SDLA Visualizer for Tektronix Real-Time Oscilloscopes.
|TDR Analysis for S Parameter Creation|
This webinar reviews TDR basics and the ability to create S-parameters using TDR/TDT measurements to validate high speed channels for debug or de-embedding in a Serial Data Link Analysis application.