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BERTScope CR

The BERTScope Clock Recovery CR Series advanced architecture measures and displays the PLL frequency response from 100 kHz to 12 MHz; the highest loop bandwidth available for jitter testing on the market today. The first clock recovery instruments to allow full control of parameters including loop bandwidth, peaking/damping, and roll off. See more bit error rate testers »

Features

Benefits

Data Rate Range up to 28.6 Gb/s Continuous data rate coverage for next generation I/Os including PCIe 3.0, 10GBASE-KR, 16xFC, 25 & 28G CEI and 100GBASE-LR-4 & ER-4.
Independent control, measurement, and display of phase lock loop (PLL) BW, JTF (jitter transfer function) and peaking. Provides accurate "Golden PLL" response for transmitter jitter compliance testing and stressed receiver sensitivity test calibration. Provides full flexibility for device characterization.
Clock Recovery Input Equalization Enables clock recovery on high ISI signals without impacting the data stream under test. Recovered clock enables other analysis including "clean eye", application of FIR filtering to signal, and BER testing.
Edge Density Measurement Allows instant determination of the mark density of the signal under test.
Jitter Spectral Analysis and Frequency Gated Integrated Jitter Measurements Provides 200 Hz to 90 MHz display of jitter vs frequency with cursor based measurements of jitter peaks' amplitude and frequency. Frequency gated integrated jitter measurements PCIe 2.0 compliance testing.
Optional 24 MHz PLL BW Meets the JTF bandwidth requirements of USB 3.0, 6 G SATA, and PCIe-Gen 3.
Extensive set of subrate (recovered) clock outputs. Frequently needed for device reference clocks.

 

Model Description Max Data Rate List Price
CR125A Clock Recovery Instrument 12.5 Gb/s Configure & Quote
CR175A Clock Recovery Instrument 17.5 Gb/s Configure & Quote
CR286A Clock Recovery Instrument 28.6 Gb/s Configure & Quote
Data Sheet Accessory Description
 
CR125ACBL HIGH PERFORMANCE DELAY MATCHED CABLE SET (REQUIRED FOR BERTSCOPE & CRU IN SSC APPLICATIONS)
 
PMCABLE1M Precision Phase Matched Cable Pair, 1m

The physical setup for USB 3.1 receiver calibration and testing is shown in this video.
The USB 3.1 Receiver application's Margin Test feature gives engineers quantitative answers on a design's performance and as a debug tool, a better understanding of where devices fail. This video ...
This video focuses on the Link Training Status State Machine UI feature of the USB 3.1 Gen2 Receiver test application and shows the path that is taken by a device being trained into loopback mode ...
Get an overview of the optical solutions available from Tektronix. Learn about what we showcased at our OFC 2016 exhibit, then learn more about these solutions online.
1m 16s
2020 Tektronix and Keithley Product Catalog
We have the right products to ensure your success. Browse our new Tektronix and Keithley Product Catalog and explore our complete line of test and measurement solutions. You’ll find over 130 pages of key product details and specifications, applicat
Selection Guide 16 Jan 2020
What is the electrical specifications for SMAPOWERDIV used with the Clock Recovery in Tektronix BERT scopes?
NOMINAL IMPEDANCE: 50 ohm FREQUENCY RANGE: dc to 18.0 GHz INSERTION LOSS (between input & either output arm): 6 dB nominal, -0.2 dB, +1.2 to 10 GHz, 1.5 to 18 GHz MAXIMUM INPUT POWER: 1 watt CW, 1 kilowatt peak (5 μsec pulse width, 0.05% duty cyc
Faq Id64616 15 Jan 2020
How do I use TekExpress to perform a USB 3.0 Device Transmitter Test?
USB 3 Tx Testing ScriptHello and welcome to Tektronix! Today I’m going to walk through a USB 3 Device Transmitter Test using TekExpress.A USB 3 Transmitter test consists of acquiring the signal from a USB 3 Device and running it through various tests
Faq Id69376 15 Jan 2020
On the PCIe PLL Bandwidth Tester Windows application that's used with the CR286A, there is a drop down under "Options" called "Enhanced Measurement" and has the options of "Standard", "Sensitive", and "Disabled".What does each option do?
In 8G mode only, some DUT’s are sensitive to the initialization routine, which involves forcing a re-lock of the DUT PLL several times to optimize the peaking measurement.The “Standard” selection uses a method that toggles the CR divider reset to cau
Faq Id72106 15 Jan 2020
BERTScope Clock Recovery Datasheet

Literature Number: 65W-25479-9
Datasheet 12 Jan 2020
Tektronix BERTScope
BSA & BA Remote Control Guide Programmer Manual

Part Number: 077069604
Manual 26 Nov 2019
Tektronix BERTScope
BSA & BA Remote Control Guide Programmer Manual

Part Number: 077069602
Manual 26 Nov 2019
Tektronix BERTScope
BSA & BA Remote Control Guide Programmer Manual

Part Number: 077069601
Manual 26 Nov 2019
Tektronix BERTScope
BSA & BA Remote Control Guide Programmer Manual

Part Number: 077069603
Manual 26 Nov 2019
Tektronix BERTScope
BSA & BA Remote Control Guide Programmer Manual

Part Number: 077069605
Manual 26 Nov 2019
Tektronix BERTScope
BSAPCI3 Instructions

Part Number: 071304600
Manual 26 Nov 2019
Tektronix BERTScope
Clock Recovery Instruments Quick Start User Manual

Part Number: 071285202
Manual 26 Nov 2019
Tektronix BERTScope
Clock Recovery Declassification & Securities Instructions

Part Number: 077110200
Manual 26 Nov 2019
Anatomy of an Eye Diagram
This application note discusses different ways that information from an eye diagram can be sliced to gain more insight. It also discusses some basic ways that transmitters, channels, and receivers are tested. Download the PDF to read more:

Literature Number: 65W_26042_0
Application Note 26 Nov 2019
PCI Express® Transmitter PLL Testing — A Comparison of Methods
There are several methods of measuring PLL loop response, based on the type of test instrumentation used. As expected, the various methods trade off test accuracy, test speed (throughput), ease of use, ease of setup, and initial cost. In addition, s

Literature Number: 65W_25911_0
Primer 26 Nov 2019
Dual-Dirac+ Scope Histograms and BERTScan Measurements
This primer discusses how the dual-Dirac relates to practical measurements that can be made with sampling scopes and BER-based instruments.

Literature Number: 65W_26041_0
Primer 26 Nov 2019
Bridging the Gap Between BER and Eye Diagrams — A BER Contour Tutorial
BER Contour Measurement - What it is, how it is constructed, and why it is a valuable way of viewing parametric performance at gigabit speeds.

Literature Number: 65W_26019_0
Application Note 26 Nov 2019
BERTScope® Bit Error Rate Testers Jitter Map “Under the Hood”
Delve into jitter problems in new ways, such as examining Random Jitter on each edge of the data pattern, separating out the jitter caused by transmitter pre-emphasis, and performing jitter decomposition on long patterns such as PRBS-31.  

Literature Number: 65W_25907_0
Application Note 26 Nov 2019
BERTScope™ CR125A+ 175A+ & 286A Clock Recovery Fact Sheet
Key Specs and Ordering Information for BERTScope CR125A, 175A, & 286A Clock Recovery.

Literature Number: 65W-25610-0
Fact Sheet 26 Nov 2019
Clock Recovery Primer, Part 2
Part 2 of looking at clock recovery from a practical point of view with emphasis on how it affects measurements.

Literature Number: 65W_26024_0
Primer 26 Nov 2019
Comparing Jitter Using a BERTScope® Bit Error Rate Testing
Comparison of DCD and F/2 Jitter.

Literature Number: 65W_26040_0
Application Note 26 Nov 2019
Clock Recovery Primer, Part 1
Part 1 of looking at clock recovery from a practical point of view with emphasis on how it affects measurements.

Literature Number: 65W_26023_0
Primer 26 Nov 2019
Clock Recovery’s Impact on Test and Measurement
As clock recovery becomes increasingly common in more systems and test setups, its effects on measurements must be considered. Many outside influences can disturb the relationship between data and how it is clocked. By understanding the relationship

Literature Number: 65W_26074_0
Application Note 26 Nov 2019
Evaluating Stress Components using BER-Based Jitter Measurements
This primers describes how jitter measurements can be self-verified using a BER-based Jitter Peak measurement and how to simplify the jitter measurement challenge by using a pattern that does not contribute pattern-dependent effects, and finally sho

Literature Number: 65W_26050_0
Primer 26 Nov 2019
Characterizing an SFP+ Transceiver at the 16G Fibre Channel Rate
Study the measurements needed to test an SFP+ transceiver to the 16G Fibre Channel standard, covering both Multi- Mode 850 nm and Single Mode 1310 nm interfaces. Included is a test and characterization example using a Single Mode 1310 nm laser SFP+

Literature Number: 65W_25908_0
Primer 26 Nov 2019
BERTScopePC Software V 10.9.1024
The BERTScope PC software provides for PC control of BERTScope Clock Recovery (CR125A, CR175A, CR286A) and Digital Pre-Emphasis Processor (DPP125, DPP125B) instruments that are being operated as stand-alone instruments, i.e. not connected directly to

Part Number: 1000000482
Software 12 Nov 2019
BERTScopeCR Help File V1.0
BERTScope Clock Recovery Instrument Help File for offline use.

Part Number: 066130900
Software 12 Nov 2019
BERTScopePC Software, V 10.15.1284
The BERTScope PC software provides for PC control of BERTScope Clock Recovery (CR125A, CR175A, CR286A) and Digital Pre-Emphasis Processor (DPP125, DPP125B, DPP125C)and BSAITS instruments that are being operated as stand-alone instruments, i.e. not co

Part Number: 063430803
Software 12 Nov 2019
BERTSCOPE PC APPLICATION SOFTWARE - V12.04.5522
The BERTScope PC software provides for PC control of BERTScope Clock Recovery (CR125A, CR175A, CR286A) and Digital Pre-Emphasis Processor (DPP125B) instruments that are being operated as stand-alone instruments, i.e. not connected directly to a BERTS

Part Number: 063430806
Software 12 Nov 2019
Six Sigma’ Mask Testing with a BERTScope® Bit Error Rate Tester
Six sigma is a form of mask testing that provides for critical insight when mask testing depth specification are important for pass/fail testing or deeper evaluation on high-speed signaling standards to provide a significantly more complete picture

Literature Number: 65W_26046_0
Application Note 12 Nov 2019
Stress Calibration for Jitter >1UI
While measuring the amount of jitter present on a signal is relatively straight forward conceptually; when the levels of jitter are small, amounts above a bit period (1 unit interval or UI) can be more difficult. This has practical consequences for

Literature Number: 65W_26047_0
Application Note 12 Nov 2019
Stressed Eye Primer
In addition to an introduction to stressed eye testing, this primer discusses some of the high-speed standards that use it, and how a receiver test using stressed eye is constructed.

Literature Number: 65W_26049_0
Primer 12 Nov 2019
Stressed Eye: “Know What You’re Really Testing With”
BER-based measurements can provide a better view of the stress eye opening down at the deep BER levels that the receiver will be expected to operate at when it is tested.

Literature Number: 65W_26048_0
Primer 12 Nov 2019