Wired Communications

Accelerate PCIe, SAS and SATA testing with a single test solution including automation and debug capabilities. Speed up your 400G product development with PAM4 testing to efficiently validate your technology advances. Get to compliance faster with your Type-C devices.

400G PAM4 Testing

Optical Manufacturing Tests for 400G
Accelerate 400G product development
Validate faster and increase yield

Coherent Optical

No more trial and error
Automate to reduce calibration times and measure accurately

PCIe, SAS, SATA
Test and Debug

Automate calibration
Close the loop on loopback debug
Superior signal integrity and debug

Consumer Standards Over Type-C

Get to compliance faster for next gen USB, DisplayPort, HDMI
Build confidence on the margin of devices
Avoid expensive overdesigning

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Performance Scope Configuration Guide

Reference our configuration guide to find standard configurations, options, and other support for planning purposes. This guide will be updated as new configurations are created.

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Using Attenuators with Oscilloscopes Using attenuators to pre-condition incoming signals before acquisition in an oscilloscope channel is common practice. Tektronix DPO70000SX series oscilloscopes’ high-bandwidth ATI channels rely on …
DDR5 Measurement Challenges The world is currently experiencing an explosive growth in the amount of data being generated. This is a trend expected to accelerate as new technologies are implemented at wider scales …
PCIe Gen5 Flyer Get an overview of Tektronix’s PCIe Gen5 solution for transmitter testing across x1, x4, x8, or x16 links with flexible test configurations and comprehensive reporting. For full detail see …
Efficient Verification and Debugging for DDR5 Memory Interfaces Get an overview of the Tektronix TekExpress DDR5 Transmitter Solution, an automated system-level test application that lets you quickly, efficiently and reliably validate and debug DDR5 designs to …
Efficient Verification & Debugging for LPDDR5 Memory Interfaces Get an overview of the Tektronix LPDDR5 Transmitter Solution, an automated system-level test application that lets you quickly, efficiently and reliably validate and debug LPDDR5 designs to meet more …
USB4 Flyer Get an overview of our USB4 Transmitter Solution and learn how it can streamline the USB4 compliance testing journey. We designed our solution with custom test environments in mind so that designers …
PCIe Gen 5 Tx Tech Brief Background With the expected dramatic rise in the number of internetconnected devices and associated high bandwidth requirements of 5G and Internet of Things (IoT), data center …
Fast PCIe Rx Insight Using the TMT4 Margin Tester Introduction Traditional receiver equalization testing is performed using a calibrated oscilloscope and Bit Error Rate Tester (BERT) setup to test the performance of the device under test’s (DUT) …

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Fast and Frequent PCIe Link Health Evaluation Watch as we show real-world examples where a new tool for evaluating PCIe link health, the TMT4 Margin Tester, enabled root cause analysis or real-world simulation testing for both transmit and …
PCI Express Gen 5 Update Webinar Cloud-based computing power, storage capacity, and network bandwidth have led to the development of the PCI Express 5.0 specification for 32.0 GT/s. This webinar starts with an overview of 5.0 …
Addressing PCIe Gen1-5 Test and Debug Challenges with Confidence Learn how to address the test and measurement challenges posed by PCIE Gen1-5 for both base silicon testing and CEM compliance testing. Gain insights and solutions for automation, validation, and …
Troubleshooting in the Fast Lane Watch our review of the physical layer specification as well as compliance test and troubleshooting of the new IEEE 802.3ck Ethernet standard, with particular focus on the AUI interfaces test. The …
HDMI 2.1 Test Challenges HDMI specification version 2.1 is the most recent update of the HDMI standards and supports a range of higher video resolutions and refresh rates, including 8K60 and 4K120. Watch this presentation …
Solving 400G Data Center Interconnect Measurement Challenges This webinar will equip you to address the challenges posed by the forthcoming interoperability standards. OIF standards for interoperability of 400G coherent links for Data Center Interconnects (DCI) …
PCI Express Gen 5 Reference Clock Webinar This webinar presents an overview of reference clock jitter requirements as they have evolved and offers techniques for making these low femtosecond measurements using a real time oscilloscope.

Wired Communications

Wired Communications

400G PAM4 Testing

Coherent Optical

PCIe, SAS, SATA Test and Debug

Consumer Standards Over Type-C

Performance Scope Configuration Guide

PCIe, SAS, SATA
Test and Debug