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How do I test a JFET for Small Signal Forward Transfer Admittance on my curve tracer?

Frage:

How do I test a JFET for Small Signal Forward Transfer Admittance on my curve tracer?

Antwort:

Small SignalForward Transfer Admittance - |Yfs|

(aka Small Signal Transconconductance - Gm)

What It Is:

Small signal forward transfer admittance is the ratio of a change in ID to a change in VGS, with the initial VGS value usually = 0. The (Delta I/ Delta V) ratio is commonly referred to as small signal gain and is given in units of mhos (Siemens).

On the curve tracer, |Yfs| is checked by measuring the difference in ID between two curves.  The Collector Supply drives the drain and the Step Generator drives the gate.  The Step Generator provide two values of VGS

(i.e. VGS=0 and VGS=0 - one step).  The change in drain current is divided by the change in gate voltage to arrive at |Yfs|.

What The Display Shows:

The display shows VDS on the horizontal axis, and ID on the vertical axis.  With the Step Generator providing gate drive, two curves will be displayed - the first at VGS=0 and the second at VGS=0 minus the value of one step.

The specification is met when |Yfs| is between the specified min/max limits.

How To Do It:

1. Set controls:

            A: Max Peak Volts to the lowest setting above the specified VDS

            B: Max Peak Power Watts to the lowest setting that satisfies (ID x VDS)

            C: Horizontal Volts/Div to display VDS between the 5th and 10th horizontal divisions

            D: Collector Supply Polarity to (+DC) for N-channel or (-DC) for P-channel

            E: Vertical Current/Div to display (Max Yfs/VGS)  between the 5th and 10th vertical divisions

            F: Configuration to (Base/Step Gen, Emitter/Common)

            G: Step Generator to Voltage

            H: Step Generator Polarity to apply reverse bias  (- for N-channel), (+ for P-channel)

            I: Step Mult .1X to On           

            J: Number of steps to one   

            K: Step/Offset Ampl to approx 1% of the specified VDS

            L: Variable Collector Supply to minimum % (full ccw)

            M: DotCursor ON

2. Apply power to the JFET:

            A: Position the Left/Right switch as appropriate

            B: Slowly increase the Variable Collector Supply % until the specified  VDS is reached.

3. Readjust scale factors:

            Readjust Vertical Current/Div to display ID(max) between the 5th and 10th  vertical divisions

4. Take the readings:

            A: Place the Dot cursor on the ID(max) curve, and note the ID reading - ID1

            B: Place the Dot cursor on the ID(min) curve, and note the ID reading - ID2

5. Calculate |Yfs|

            Calculate, using the formula: [(ID1 - ID2) / Step Amplitude]

6. Compare to data sheet specifications:

            Check that |Yfs| is within the specified min/max limits


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