질문:
Using TDSHT3+ my eye diagrams/ clock jitter plots are getting clipped+ or I get an empty plot. What should I do?
답변:
Eye diagrams are expected to be around zero absolute voltage. The sink and source eye diagrams are symmetry about absolute zero. If the signal has a significant offset, there is chance of violating the top and bottom mask. If the offset is more than 75% of the Vswing the plot will be empty.
To avoid this ensure that the Probe calibration is carried over before doing the eye diagram/ Clock jitter measurement.
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FAQ ID 59856
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