PCI Express

The BERTScope Automated PCIe Receiver Solution is designed to streamline the tedious and labor-intensive receiver test workflow.

Features and benefits

• Automated calibration, link training, loopback initiation, and testing
• BER Map feature for TxEQ optimization
• Reduces the time and minimizes the skill-set required to perform the calibration and testing
• Increases the reliability and accuracy by removing inconsistencies with manual calibration
• The BSX BERTScope series provides the tools and flexibility you need to visualize and control the handshaking and link training process for PCIe 3.0/4.0 devices.

Applications

• PCIe Receiver Testing for:
  • Host and device silicon validation
  • Add-in card and system compliance testing
  • Switch, Bridge and Retimer silicon validation

Complete BERTScope automation for receiver testing

The BERTScope Automated PCIe Receiver Solution is designed to streamline the tedious and labor-intensive receiver test workflow. No longer is expert PCIe domain knowledge required to configure, calibrate, test, and document the results. Fast and accurate BERT-based testing provides high test throughput, intuitive and fast margin testing, and availability of a wide range of debugging tools when further testing is required. The result is high test productivity from setup through to the documentation of results.

This solution can also be used for the latest, emerging storage interfaces such as next-generation SSD and host controller interfaces that utilize NVMe and SATA Express protocols that reside on top of a PCIe physical layer.

Test configuration wizard

The BERTScope Test Configuration Wizard provides step-by-step guidance for Receiver Test equipment setup and software setup. Clearly drawn block diagrams, cabling configurations, and descriptions simplify the test configuration setup.

BERTScope BSX Series

Automated stress calibration

An important step in preparing for receiver testing is the calibration of the stress sources to ensure that the stress applied at the test fixture to the device under test is truly compliant with the test standard. In the past, these calibrations were often the most tedious and error-prone steps in the receiver test setup process. With the PCIe Receiver Automation Software, the calibration of the stress "recipe" is completely automated, including the calibration data. For test configurations that do not change, this step only needs to be performed once, and the stored calibration data is immediately available to be recalled. Engineers can spend less time calibrating, and more time testing.

Locating EH/EW targets

Calibration to final EH/EW targets

Automatic characterization and precise calibration of de-emphasis

Automatic characterization and precise calibration of preshoot

Automatic characterization and precise calibration of random jitter

Loopback initiation and link training

Before the receiver test can start, the device-under-test (DUT) must be put in the proper test mode, called Loopback, where the device is re-transmitting the exact same data that was received. Entering Loopback mode is challenging because of the variety of loopback negotiation sequences across the range of PCIe devices. The BERTScope PCIe software provides various techniques, including Link Training, to train and optimize the link for receiver testing.

Flexible link training and loopback control

Pattern and protocol sequencer

The BSX includes a pattern/protocol sequencer that allows users to create their own protocol-based patterns and link state traversals via stimulus-response feedback. The sequencer assists users in initiating and debugging protocol handshaking by facilitating the creation of customizable protocol sequences.

The sequencer supports up to 128 states and two levels of loop nesting. Advancing from state to state in the sequence can be accomplished by software control, external signal, or error detector match. The error detector can match up to 16 user-defined blocks, with 128 bit/s per block, and a stimulus/response trigger output allows cross-triggering of the oscilloscope.

Users can use the sequencer to create protocol sequences based on PCIe standards to facilitate loopback initiation and protocol handshaking. Those sequences can be flexibly edited (adding/removing protocol blocks, modifying symbol encoding, data scrambling, or DC balancing) to aid in debugging challenging PCIe- related protocol handshaking issues.

BER map

One of the key challenges setting up the link is tuning or determining the optimal RxEQ settings. The BER Map feature provides an automated way to scan the PCIe TxEQ coefficient matrix to determine the optimal TxEQ for a receiver's RxEQ settings.

Automated BER map result

Preset test

Preset testing is a critical part of the PCIe receiver test and is a single-click operation with the PCIe Automation Software. With real-time stress adjustment, quick synchronization, and BER testing ability, the BERTScope provides the ideal platform for fast jitter compliance testing. Test results are stored using the built-in database for later recall and report generation.

PCIe Preset test results

LEQ test

At higher speeds of Gen 4, dynamic link equalization becomes necessary from signal integrity viewpoint. There are two sets of link equalization test, namely for Transmitter Equalization and Receiver Equalization. BERTScope based solution provides total automation of the two tests with individual summary of results for user-analysis.

Tx Link EQ Test

Rx Link EQ Test

Remote control protocol

The test software can be operated remotely through ASCII commands sent through TCP/IP, giving engineers further flexibility in designing “beyond compliance” tests.

Debugging tools

When a device fails to meet the test requirements, the operator has the power of the full range of BERTScope debugging tools. From intuitive and fast manual stress adjustment, pattern sequencing error location analysis, and jitter decomposition, the BERTScope can help identify subtle issues that other instruments might miss.

Margin test

Margin test supports SJ Margin. Select the starting and ending SJ value and test the DUT. The BSX will be set with the appropriate starting SJ and it will test the DUT. SJ will be increased by the prescribed step size and DUT is tested again until the DUT starts failing.

Example configuration is shown in the following Margin Test configuration menu.