Jitter Measurement and Timing Analysis

Understanding timing jitter has become a mandatory part of high-speed communications system design. Many of today’s serial data standards require extensive jitter compliance tests.  Whether you need a quick clock jitter measurement or a thorough analysis of a BER performance problem, Tektronix' comprehensive test instrumentation portfolio enables you to meet your design goals and compliance requirements – fast.

  • 80SJNB Jitter & Timing Analysis for Sampling Oscilloscopes: When used with the Tektronix DSA8300 Sampling Oscilloscope, 80SJNB analysis software performs timing and noise-based analysis to get a 3-D view of the eye diagram performance for deep, accurate evaluation on signals with speeds up to and beyond 50GHz.
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Understanding and Characterizing Timing Jitter Primer

Timing jitter is the unwelcome companion of all electrical systems that use voltage transitions to represent timing information. This paper focuses primarily on jitter in electrical systems.

Choose the Right Platform for Your Jitter Measurements

This document will explain some essential jitter terms, and then go on to discuss jitter measurements and the tools best suited for evaluating and quantifying jitter, when working with serial data communication architectures.

Characterizing Phase Locked Loops Using Tektronix Real-Time Spectrum Analyzers

This application note presents an overview of Phase Locked Loop operation including both linear and non-linear effects. It also shows measurements of these effects in both the time and frequency domains using Tektronix Real-Time Spectrum Analyzers.

Anatomy of an Eye Diagram

Description of an eye diagram, how it is constructed, and common method for generating one.

Characterizing an SFP+ Transceiver at the 16G Fibre Channel Rate

Measurements needed to test an SFP+ transceiver to the 16G Fibre Channel standard.

Clock Recovery Primer+ Part 1

Look at clock recovery from a practical point of view, Part 1.

Clock Recovery Primer+ Part 2

Look at clock recovery from a practical point of view, Part 2.

Clock Recovery’s Impact on Test and Measurement

This application note discusses the outside influences that can disturb the relationship between data and how it is clocked.

Dual-Dirac+ Scope Histograms and BERTScan Measurements

Introduction to Dual-Dirac.

Stress Calibration for Jitter >1UI

A practical methods for stress calibration.
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Anatomy of Jitter

This webinar describe the different categories and types of jitter; the origins and interrelationships and how they can be used to diagnois, characterize and debug system hardware. Plus, explain how these various jitter measurements are applicable to your specific application.

The Impact of Clock Recovery on Your Serial Data Measurements

This video discusses the basics of clock recovery impact on your measurements. Why it is needed, the effect on jitter, as well as calibration considerations.

Dual-Dirac Jitter Model

This video is a refresher of the Dual-Dirac Jitter Model, which is one of the tools available for predicting your system's performance and troubleshooting/improving the system or components of the system.

Avoiding Pitfalls in Jitter Measurements

This webinar discusses common pitfalls when making jitter measurements and how you can avoid them when making your measurements.

How to Choose the Right Platform for Jitter Measurements

Learn what to consider when selecting a platform for jitter measurements.

Beyond Receiver Interoperability Testing Webinar

This 45 minute, live webinar will focus on the latest tools and techniques for properly performing jitter tolerance and stressed receiver sensitivity testing - including characterization and margin testing of next generation receivers. .

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