Verifying USB 2.0 Devices for Compliance
Background
USB is enjoying broad adoption in the marketplace today. Over 1,000 devices have passed compliance testing. According to PC Data's April 2000 US retail sales data, USB peripherals are the best-selling products in several device categories. Also, according to August 2000 data from Dataquest, the USB installed base of USB-capable PCs will grow from a mere 6 million PCs in 1996 to over 700 million by the end of 2003.
USB is an industry-standard extension to the PC architecture with its focus on PC peripherals. The primary goals of USB include:
- Ease of use for PC peripheral expansion
- Low-cost solution that supports transfer rates to 480 Mb/s
- Full support of real-time data for voice, audio, and video
- Protocol flexibility for mixed-mode isochronous data transfers and asynchronous messaging
- Integration in commodity device technology
- Comprehension of various PC configurations and form factors
- Provision of a standard interface capable of quick diffusion into product
- Enabling new classes of devices that augment the PCs capability
- Full backward compatibility of USB 2.0 for devices built to previous versions of the specification
USB 2.0 describes low speed, full speed and high-speed data rates. It is envisioned that high speed and full speed data types may be isochronous, while low speed data supports less data intensive, interactive devices such as a mouse and keyboard.
USB utilizes a 4-wire system plus shield. They are VBUS, D-, D+, and Ground. VBUS supplies power to devices that derive their primary power from the host or hub. Beginning with USB 2.0, the USB-IF has instituted a certification and marking program to persuade developers to fully test their USB devices. Upon certification, device manufacturers may apply a new USB trademark logo that indicates a device is certified and conforms to all applicable USB 2.0 specifications.
Preparing for Certification
The USB-IF organization has now adopted a compliance/certification branding program that requires device suppliers to prove compliance before they are permitted to affix the Certified USB High-Speed logo to their products.
USB 2.0 designers of a high-speed capable device must ensure that their device meets all the certification requirements contained in the USB 2.0 Specification. At the USB Compliance workshops (Plugfests), a variety of USB devices, test fixtures, and test equipment are provided by the USB-IF and equipment vendors to help designers verify compliance.
USB-IF has also established a network of independent certification resources to aid the device developer in achieving certification. These third-party companies can help device developers gain certification or determine how their devices are failing some aspect of the USB 2.0 specification. The Plugfests are generally conducted three to four times a year. Three sessions are conducted on the West Coast, in Silicon Valley and a yearly session is conducted in Asia. A list of third party certification companies is listed on the USB-IF web site.
With time to market paramount, device designers really need to verify compliance as soon as possible. Quarterly Plugfests, while convenient, may not always provide the timeliness necessary to get product to market, especially if a candidate device fails certification during a Plugfest and the necessary corrective action extends beyond the ability to retest at that time.
A manufacturer will not want to wait another quarter until testing for certification can recommence. There is the possibility of performing certification testing with a third party for devices that fail. It may prove an expensive undertaking to repeat a certification cycle of submit, fail, repair, and retest. Time is money, and the third party testing houses need to charge their customers for each cycle.
Obviously, the solution is to submit to certification devices that, to the best of the designers ability, have a high probability of passing. To ensure this outcome means that the designer must test and verify prior to entering the certification regime.
Ensuring that the device stands a good chance of passing certification requires pre-compliance, preferably at the designers site, be conducted to the level that you have reasonable confidence that the device will pass.
In USB 2.0 Specification, Chapter 7 describes in detail the physical layer operating characteristics of a compliant USB 2.0 device. Low and full speed devices have been on the market for a number of years and the test requirements are fairly well understood. High-speed devices are just now being designed and verified and are the focus of this technical brief.
At a signaling rate of 480 Mb/s, a high-speed compliant device must present well-behaved transmission line characteristics to downstream and upstream devices. To achieve this data rate, each data line is terminated at each end with a 45 Ohm resistor to ground resulting in a 90 Ohm differential termination.
To transmit in high-speed mode, the transceiver directs its internal current source to either the D+ of D- data line, signaling a J or K respectively. The data is encoded in NRZI, the same as for low and full-speed modes. The actual drive levels without a load, measured differentially in either the J or K state, are 400 mV 10%. The differential voltage is used to determine when the link is in Squelch mode and not in a valid state. Also, a downstream facing device uses the differential voltage level to detect if the signal at its connector is in the high-speed state and to detect device disconnection.
Test & Measurement Issues
Fundamentally, USB 2.0 device compliance testing closely follows the compliance test protocol for USB 1.1 devices. The primary additions concern USB 2.0 high-speed mode.
High-speed mode adds a new level of complexity to USB device design. The new 480 Mb/s maximum data rate requires design techniques that are more familiar to RF Engineers than digital designers. Fortunately, the USB-IF web site contains presentations, white papers, etc. that offer guidance to designers unfamiliar with this new territory.
Areas that require particular design attention include:
- Device Packaging
- Board Layout
- Chassis Grounding
- Trace layout
- EMI remediation
- Data Signal Attenuation/Jitter
The USB 2.0 Specification contains detailed physical layer requirements for compliant devices. Specifications include Tx & Rx voltage limits, cable and circuit board impedance, time delay, capacitive loading, signaling, test mode support, power distribution and consumption, in-rush current, jitter, edge and bit timing.
In general, USB compliance tests verify device conformance:
- To the rules of the USB Device Framework
- In-rush current characteristics
- Upstream signal quality
- Downstream signal quality
- Squelch
- Time Domain Reflectometry
- Voltage drop & droop
- Other tests
Device Framework
This portion of the compliance test suite evaluates adherence to low-level USB device protocol. The DUT will be checked for correct enumeration and response following reset recovery. Other device states checked include suspend, addressing, remote wakeup, dynamic connection and removal. Chapter 9 of the USB2.0 Specification provides detailed information regarding device framework. A typical test setup will include a USB Host system, self-powered hub, CATC UHT hub tester(s), mouse or other HID.
In-Rush Current/Voltage Drop & Droop characteristics
To prevent the possibility of damage to an upstream device, USB devices that are bus powered must implement in-rush current limiting as defined in the USB 2.0 Specification, Chapter 7. The profile of the in-rush current spike is restricted so the transient response of the power supply is not overwhelmed. The rising edge of the current spike must be no more than 100 mA/ms. Downstream facing ports must be able to absorb the 500 mA peak current spike with a rising edge spike not faster than 100 mA/us and meet the voltage droop requirements defined for in-rush current during dynamic attach. Designers must also verify in-rush current when devices wakeup, either by themselves (remote wakeup) or when the device is signaled to resume. The device must limit the in-rush current on VBUS. The maximum droop on VBUS through the hub is 330 mV. Additionally the device must have sufficient on-board bypass capacitance or a controlled power-on sequence such that the current drawn from the hub does not exceed the maximum current capability of the port at any time. Bus powered hubs must have a Vdrop of < 100 mV between upstream and downstream ports when 100 mA loads are present on all downstream ports. Bus powered hubs with captive cables must have a Vdrop of < 350 mV between upstream and all downstream ports including the cable.
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The Compliance Test Fixture or the SQiDD (Signal Quality Drop/Droop) board is a test interface board that is required when running the USB MATLAB test scripts. The SQiDD board provides access to the differential data lines (D+ & D-), VBUS, provides access/connections via on board USB connectors or wired dongle. The SQiDD board provides necessary connections for scope probes and SMA cables. The SMA cables are needed to connect the data generator to data lines to stimulate the device during squelch and receiver sensitivity testing. Cable access is also provided to allow impedance measurements by a TDR measurement device.
Test equipment required for in-rush current testing includes the USB Host system, oscilloscope, test software and fixture (Tektronix TDSUSB2), and current probe (Tektronix TCP202).
Upstream Signal Quality
USB2.0 interface chips provide built-in test modes that enable upstream signal quality measurements on transmit signal levels, termination resistance, rise & fall time, signaling rate, and jitter. The test setup uses a Tektronix TDS694C or TDS7404 P6248 Differential Probes to acquire data from the DUT via the SQiDD board. Various waveform files are captured by the scope and are processed by the USB 2.0 compliance test software (TDSUSB2). The specification requires data signal levels of 400 mV 10%, termination impedance of 45O Ohm 10%, high-speed bit rate of 480 Mb/s 500 ppm, and transition times of > 500 ps. The test script uses eye diagrams to analyze the data for jitter, reflections, and attenuation for all bits in the Sync and EOP (End of Packet) field. The test requires the equipment described above plus five self-powered hubs, daisy chained to simulate a fully populated USB topology.
Downstream Signal Quality
The TDSUSB2 test software is used to evaluate downstream signal quality by calculating eye diagrams, cross over, EOP, signal rates, and jitter from data acquired by the oscilloscope.
Receiver Sensitivity
To increase robust operation in a noisy environment, a USB 2.0 device must respond to IN tokens with NAKs when the signaling level is at or above the specified level. The receiver sensitivity test requires a high-speed data source that can transmit IN tokens of varying amplitude such as the Tektronix DG2040. The test requires the DUT to be placed in Test_SE0_NAK mode. Signaling amplitude is presented to the DUT at a level at or above 150 mV. At these levels, the DUT must be in the unsquelched mode by responding to IN packets with NAKs. The amplitude is then reduced to <100 mV and at this level, the DUT must be squelched.
Time Domain Reflectometry
Due to the high signaling rates of USB 2.0 High-Speed mode, trace and packaging impedance have become critical parameters. The USB 2.0 Specification now requires differential impedance measurements of cables and devices.
The USB specification requires that the differential TDR impedance step response be set to 400 ps. The USB specification defines the impedance limits referenced from the DUT connector. In general, the impedance should be between 70 Ohm and 110 Ohm at a given distance from the connector. Cables are also required to meet specific impedance limits. These limits are 90 Ohm 15%. The Tektronix TDS8000 Sampling Oscilloscope with the 80E04 sampling head provides true differential TDR that is an ideal solution for USB device and cable impedance measurements.
Other tests
Additional tests must be performed including transmit chirp level, common mode rejection, suspend / resume, disconnect threshold, and microframe interval. These tests require the USB Host System, TDSUSB2 and the Tektronix TDS694 or TDS7404 oscilloscope, and DG2040 Data Generator. Please refer to the USB-IF member website for complete details regarding USB 2.0 compliance testing.
Conclusion
USB 2.0 offers the device designer a migration path for high performance peripherals that preserves the ease of use consumers have come to demand. The 40X increase in data rate afforded by USB 2.0 fosters more innovation in product design and an increase in customer satisfaction. However, with the improvements in data rate come expected and perhaps a few unexpected design challenges that the device designer must resolve.
Tektronix offers a comprehensive tool set - sophisticated oscilloscopes, true differential TDR, high-speed data generator, industry leading probes and a fully automated compliance test package - to enable USB2.0 device designers to perform quick and accurate electrical compliance and physical layer validation of their designs.
Additional Information
- TDSUSB2 Data Sheet
- TDS7000 Series Real-Time Oscilloscope Data Sheet
- TDS8000 Series Sampling Oscilloscope Data Sheet
- DG2000 Series Digital Pattern Generator Data Sheet
- Oscilloscope Accessories

