• Waveform display (Zoom and Scroll). Hardware acceleration quickly provides data so that the waveform display can be drawn in seconds rather than minutes. For example, in a Waveform Window with data from a TLA7N4 (4 Msamples), the time/division setting can be changed and the display updated in 3 to 5 seconds; for a TLA7P4 (16 Msamples), it's 7 seconds.
• Search. Hardware acceleration enables the logic analyzer to quickly search the acquired data to find an anomaly. For example, in a Listing Window with data from a TLA7N4 (4 Msamples), searching through the entire acquisition memory for a hexadecimal value in a 32-bit group totaled 2 seconds; for a TLA7P4 (16 Msamples), it's 7 seconds.

Timestamp. Timestamp is a tool that significantly increases the useability of deep memory. Logic analyzers with this capability store a separate timestamp with each data sample.

• Elapsed Time Between Samples. One use of timestamp information is to indicate the elapsed time between samples or the total time from the beginning of the acquisition or trigger.
  When choosing a logic analyzer with deep memory, it's important to understand the autonomy of timestamp memory from acquisition memory. When timestamp memory is separate from the acquisition memory, it's easier for the logic analyzer to maintain time-correlation between samples and show time between samples which is useful with data qualifications.
• Data Correlation. A second use of the timestamp information is to time-correlate data between different acquisition modules. If a common reference point such as the start of an acquisition or a system trigger can be established between the modules, the data between the modules can be accurately correlated. We all know how important data correlation is when looking at mixed analog and digital signals. But viewing logic analysis data acquired from multiple modules connected to different bus structures (a microprocessor and a peripheral bus such as PCI or RAMBus(tm) for example) running at different rates can actually present an even greater challenge. Every timestamp counter is, of course, driven by a clock source. Every clock source drifts relative to its designed center frequency. As logic analyzer memory depths increase, the time covered by the acquisition window starts to get long enough that you can see significant timestamp errors between acquisition modules.
  For example, suppose there are two logic analyzer modules that have 1 Msamples of memory depth. Each of these modules uses an independent clock source for its timestamp counter. Let's assume that these cards use a 100 MHz oscillator to run the timestamp counter and that the oscillator has 100 ppm accuracy. If one logic analyzer's clock source is even slightly fast and the other is only marginally slower, by the time we look at the 1 millionth sample we can see correlation errors of up to ±100 samples. This is a problem common with older logic analyzer architectures that often require rather elaborate workarounds in an attempt to compensate for this problem.

The TLA 700 Series is based on a modern architecture where all of the logic analyzer modules are automatically phase-locked to the same clock source in the TLA700 Series mainframe. This means that every module's timestamp counter will remain in perfect alignment, and regardless of the memory depth of the module, no module-to-module timestamp drift can occur. This will be true no matter how deep Tektronix makes memory on the logic analyzer modules - 1 M, 4 M, 16 M sample or beyond, it doesn't matter.

Transitional storage. Deep memory applications can often be classified into two categories: externally clocked (i.e., synchronous) or internally clocked (i.e., asynchronous).

• Synchronous/Externally Clocked. Oftentimes, the raw clock on a target system is used to acquire data; however, large amounts of redundant data are often stored. With transitional storage, the TLA700 Series can be configured to acquire data only when a specific channel group has a data change.
  For example, if acquiring data from a target system where only one in four samples contains data of interest, a logic analyzer module with 1 M depth and transitional storage can effectively store the same amount of data as a logic analyzer module with 4 M depth that doesn't have transitional storage.
• Asynchronously/internally clocked. Sampling data asynchronously with a logic analyzer isn't significantly different from doing so with an oscilloscope. In both cases, the data should be oversampled to ensure faithful data reproduction.
  With a logic analyzer, one should strive to oversample by at least 5X the fastest data rate in the target system. In the resulting acquired data, however, it's often possible that four out of every five samples shows the same or unchanging data. Using a logic analyzer with transitional storage, however, only the data that changed is stored. Each stored sample is timestamped to ensure that the data is accurately displayed, thereby preserving the time relationship.
  For example, assuming a 5X oversample rate, a logic analyzer module with 1 M depth and transitional storage can effectively store the same amount of data as a logic analyzer module with 5 M depth that doesn't have transitional storage. Whether acquiring synchronously or asynchronously, all TLA700 Series logic analyzer modules have transitional storage and separate timestamp memory, i.e., they don't trade memory depth for timestamp.

Conclusion

Deep memory allows you to analyze and troubleshoot even the most challenging problems found in today's designs. The Tektronix TLA700 series logic analyzers have met your needs in the past. With the addition of the new deep memory modules and expanded mainframes they meet the demands of your current designs. And with their modular design, they'll be there to meet your needs in the future as well.