Serial Data Link Analysis (SDLA)
SLE/SLA Option for Tektronix DPO/DSA/MSO70000 SeriesOscilloscopes
Features & Benefits
- Analysis of High-speed Serial Data Links provides insight into eye closure
- Feed Forward (FFE), Decision Feedback (DFE), and Continuous Time Linear Equalization (CTLE) of the signal opens the eye diagram enabling measurements from the view of the receiver comparator (Option SLA)
- Simultaneously view time-aligned waveforms from the perspective of near end, far end, de-embedded, and equalized for insight of the complete link
- Improved user interface for fast switching of the Jitter Analysis View in DPOJET, Waveform View, and Serial Data Link View
- Clock recovery software with unmatched flexibility for accurate and repeatable measurement results
- S-parameter-based De-embedding supports both fixture de-embed and channel de-embed for view of the signal back towards the transmitter
- Parametric Channel Emulation: View the performance of the link with a number of emulated channels and only one transmitter signal acquisition
- "What-If" Analysis using flexible insertion/removal of transmitter equalization parameters
- Characterize the performance of advanced links using equalization
- Link budgeting and What-if Analysis with emulation of a range of channels with a single measurement
- Evaluate Transmitter Equalization (De-emphasis/Pre-emphasis)
- Acquire precise waveform shape for simulations or other processing; Rely on acquisition with state-of-the-art resolution, jitter, noise, fixture de-embedding, and filtering
- Characterize the performance for multi-gigabit standards such as SATA 6 Gb/s, USB 3.0, SAS, PCIe®, OIF CEI, XFP, IEEE 802.3 Ethernet Electrical Physical Layer, SFP+, InfiniBand, and others
- Serial Data Link Design evaluation with quick equalizer adjustments including up to 100 FFE and 40 DFE taps. Equalizer taps can be calculated automatically or imported for evaluation of proprietary designs
Version 1.1 with additional equalization, simpler user interface, programmable interface support, and other improvements.
Modern Serial Data Link Designs
Acceleration of signaling speeds creates a number of challenges for design and test. The designs are evolving to address these challenges with equalization techniques at the receiver; pre-emphasis or de-emphasis at the transmitter; with dedicated fixtures for capturing the signal at a test point; and with complex compliance-verification procedures.
Serial Data Link Analysis (SDLA) has the Tools
The advanced techniques employed by the designs call for advanced measurement solutions. The challenge begins with the signal acquisition: capturing a signal through cables and fixtures distort the signal shape; SDLA provides you with a fixture de-embedding feature which allows you to remove the effects of the fixture from the measurement. Fixture de-embedding and thus improved accuracy of your measurement might make the difference between pass and fail of your test. Another challenge results from the transmitter signal shape. The signal no longer is a simple NRZ square-wave pattern. Designers alleviate high-frequency loss in the media with transmitter equalization features, that is, with pre-emphasis or de-emphasis of the transmitter waveform. Correspondingly, transmitter signals today need to be evaluated for this transmitter equalization; the SDLA software allows for complete transmitter equalization insertion or removal.
Beyond Measurements at the Transmitter
An important part of today’s evaluation of serial data links is the complicated interaction between the measured waveform and the complex behavior of the interconnect channel. It is no longer possible to assume that if the transmitter output meets the eye diagram mask a design will work against all channels up to a given loss. Instead, advanced link test methods need to acquire the true transmitter waveform, then test against several corner-case channels.
Virtual Channel versus Physical Channel
In some cases this test can be performed with real physical channels: connect the transmitter under test to the suite of normative test channels, one channel at a time - and for every channel evaluate the signal shape at the receiver end. Oscilloscope measurement systems and DPOJET jitter and eye analysis software will give you a complete measurement facility for accurate measurements of the resulting waveform…but this methodology is still prone to other errors: are your physical normative channels really normative? Certainly each physical device has tolerances against the standard’s ideal values; furthermore the physical channel set ages and deteriorates. A virtual channel would be more stable.
Since physical corner-case channels are typically not conveniently available, the transmitter test that includes corner-case channels uses virtual channels based on the network description file, in particular on S-parameter touchstone files. Such description of compliance channels is part of new standards. Now the measurement on your transmitter under test simply involves acquisition of the transmitter signal. Then you connect the captured signal to all desired test channels, one channel at a time – in software emulation, rather than physically. This methodology is supported by SDLA; the interaction of test channels with the transmitter can be viewed without the need to reacquire the transmitter waveform. Unlike simple compliance scripts often used for pass/fail decisions the Tektronix SDLA software offers a rich set of views of the signal, supported by the most accurate real-time oscilloscope acquisition system.
Equalize, then Equalize Again
The equalization at the transmitter is one tool in the arsenal of techniques fighting the loss and dispersion in the interconnect: another one is the equalization at the receiver. Receiver equalization in most modern NRZ systems falls under either CTLE (Continuous Time Linear Equalization); FFE (Feed Forward Equalization, also known as LFE – Linear Feedback Equalization); or DFE – Decision Feedback Equalization. A receiver equipped with equalization is capable of decoding signals which, when viewed as an eye diagram, produces a closed eye. How can measurements be performed on a closed eye? The equalization tools in the SDLA can open even a completely closed eye, with your own equalizer tap values, or, at a push of a button, equalization tap values will be found for you, for either equalizer, even on random data. The speed of recalculation and the ease of use allow you to easily modify system parameters, such as the number and weight of taps, or the amount of pre- or de-emphasis; you can optimize the design, develop what-if scenarios, or confirm your simulations over a range of conditions.
Measurements and Jitter Analysis
Signals processed with SDLA might require multi-UI measurements, jitter breakdown, jitter bathtub analysis, or other evaluation. DPOJET (Option DJA) is recommended for these tasks. SDLA and DPOJET work together to analyze jitter, offer eye diagrams of equalized waveforms and a number of other views and measurements.
Flexibility of Signal Path Topology
The SDLA package for Tektronix real-time oscilloscopes supports a number of topologies for measurements besides the transmitter driving an emulated (simulated) channel. Data can also be captured downstream from the transmitter, for example at the receiver end of the serial data channel, in which case channel de-embed, rather than emulation, is used to view the signal at the transmitter end. Additionally, test fixture effects can be removed or added as necessary.
The removal of fixtures or channels decreases the signal-to-noise ratio and becomes impossible if the loss is too high. Understanding the trade-offs and limitations of signal processing is important.
Plot of Elements of the System, Filtering
In many situations the information about channels, represented by an S-parameter touchstone file or other information about the system is not completely clear: a supplier might have, for example, supplied you with a touchstone file without properly labeling its ports. To resolve the port assignment and in general to present a view of network response SDLA offers plots of the network’s S21 parameters in both frequency domain and as an impulse response in the time domain. Additionally, if the signal spectrum is not of interest above some frequency, the signal-to-noise ratio of the resulting traces will be improved by low-pass filtering the network response; you will find simple-to-setup filters in the system blocks.
Network Measurement Tools
Whenever S-parameters of the network are needed SDLA will accept data from either VNA or a TDR-base S-parameter measurement system. We recommend Tektronix TDR hardware and Tektronix IConnect® software for high-quality network measurements. Amongst the advantages of using Tek TDR and IConnect is the preservation of the DC values in the touchstone matrix, which is typically lost with other measurement methods. SDLA accepts network description based on other measurement methods, such as VNA data or field-solver calculation; the DC measurement results might need to be extrapolated in the SDLA in such cases.
For additional information we recommend the following resources: literature on the DPO/DSA/MSO70000 Series oscilloscopes, their probes and software applications; literature on Tektronix TDR/TDT and the IConnect network measurement software; and literature on SDLA package 80SJNB for sampling oscilloscopes.
Transmitter Equalization - 2-tap FFE, UI-spaced, or a custom FIR filter of 2000 taps max. Configurable as either pre-emphasis or de-emphasis, insertion or removal.
Receiver Equalization, type -
CTLE: 2nd-order IIR filter, or a custom FIR filter of 2000 taps max. FFE, up to 100 taps, settable pre/post-cursor, whole UI or fractional spacing. DFE, up to 40 taps. Taps can be set or trained.
Receiver Equalization, training - Vertical eye-opening targeting algorithm. Random data acceptable for training; repetitive pattern recommended for training of highly distorted data. Pattern detection and export/import. Training from unspecified tap values or adaptive from previously found or loaded values.
Receiver Equalization availability - Option SLA only.
Link Topology - Signal path consists of up to: Transmitter equalizer, channel emulator, receiver equalizer, and probing fixture de-embedding (attachable at one or the other end of the channel). Bandwidth filter in all blocks except receiver equalizer. Waveform at every node between blocks above available. See figure above.
Channel emulation - 1-port, 2-port, or 4-port Touchstone S-parameter matrix, with selectable port assignments, single-ended or differential; or, a custom FIR filter of 2000 taps max.
Used parameter: S21 (insertion gain from transmitter to receiver).
Waveform record length - 30 MS typical, less if high number of waveforms or measurement is active simultaneously. Equalized waveform is limited to 2 MS.
Clock recovery - 1st- or 2nd-order PLL. Variable loop bandwidth, damping ratio for 2nd-order PLL and clock delay.
Programmatic Interface - GPIB. Subset of commands available from the user interface.
Supported link topology
- DPO/DSA/MSO70000 Series oscilloscopes, with bandwidth of 4 GHz or higher, with firmware version 4.2.0 or greater. Firmware version 4.3.3 or greater is recommended for optimum processing speed.
- 15 GB of disk space (more for file-backed data objects created when performing up to 99 measurements on long waveforms).
- If DPOJET is used with SDLA the DPOJET version must be 1.2.1 or greater.
The SDLA software for Tektronix DPO/DSA/MSO70000 Series oscilloscopes is offered in two versions:
- The SLE (Essentials) version supports all features except for the Receiver Equalization block
- The SLA (Advanced) option, which adds the Receiver Equalization block
To preinstall on new DPO/DSA/MSO70000 Series oscilloscopes
Add SDLA Essentials
Add SDLA Advanced
For users with existing DPO/DSA/MSO70000 Series oscilloscopes
Add SDLA Essentials
Add SDLA Advanced
Upgrade from SDLA Essentials to SDLA Advanced
Note: The SDLA Software is supplied on the internal hard drive of the oscilloscope, and can be downloaded for free from www.tektronix.com. Software is enabled by a key code.