Datacenter and Mobile / Automotive Applications continue to grow increasingly complex, needing access to a large amount of data at faster speeds, and leading to the development of high performance memory interfaces such as DDR5/DDR4/LPDDR4 and beyond.
Join Tektronix as we provide an update on the latest characterization and debug techniques to enable analysis of the highest DDR4/LPDDR4 speed grades (DDR4-3200/LPDDR4-4266).
Our webinar will cover:
- New probing techniques to access the signals on the DRAM interface.
- Tools to enable you to quickly capture, identify, analyze and characterize the memory interface.
- New capabilities such as a decision feedback equalizer (DFE) and why they are being considered.
- What to expect from a debug and validation perspective for next generation memory.
Sign up to attend this live event. After the presentation, you'll be able to ask the speaker questions specific to your application. Can't attend? You'll also receive a link to the recorded webinar after the broadcast date.