Features & Benefits
- PCIe Test Support: Supports Compliance and Validation of PCIe Gen1/2/3 Interfaces based on PCIe Base and CEM Specifications
- Automated Setup: Automatically Set Up the Oscilloscope Horizontal and Vertical Scales to Optimize Signal Quality for Accurate Analysis
- Automated Acquisition / Waveform Management: Automatically Acquire and Save the Waveform as per the PCI-SIG-Recommended Naming Convention to Help Manage the Numerous Waveforms that need to be Acquired per Lane for Completing the Tx Test
- Automated DUT Control: Automatically Control the Dut and Step It through the Various Supported Speeds and Presets Necessary for Tx Testing
- De-Embedding: De-Embed the Effects of the Channel, Test Fixtures and Cables to Provide Results that More Accurately Represent the Signal (Requires Option SLA Serial Data Link Analysis)
- Test Selection: Select The Specification against Which to Perform the Analysis, as well as Select Individual Tests or Groups of Tests to Perform Targeted Compliance Analysis for Failing Tests
- SIGTEST Integration: Integrates the SIGTEST Dll to Perform the Analysis of the Acquired Waveforms, Providing the Ability to Test a System using the PCI-SIG-Recommended Analysis Tool
- Reporting: Compile all the Results of a Test Run into a Customizable Report with Pass/Fail Results for Easy Analysis and Record Keeping
- Pattern Matching: Verifies that the Correct Set of Compliance Patterns are sent by the Transmitter before Acquiring Signals for Compliance Analysis.
- PHY Level protocol Decode: Decode and Display of PCIe Data in a Protocol-Aware View. A Time-Correlated Event Table View with Waveforms allows for Quickly Searching through Events of Interest.
- Multi-Lane Testing: Perform Analysis on Multiple Lanes of PCI Express Data using Differential Probes that Speed Up the Tx Analysis in a Multi-Lane System
- Compliance And Debug: Provides a Toolkit of DPOJET-Based Setups to Quickly Switch into Debug and Validation Mode in case a DUT Fails Compliance
- Analysis And Debug Tools: Tektronix provides a Broad Range of Compliance, Debug, and Validation Tools for Transmitter, Receiver and Protocol Testing
Applications
Tektronix provides the most comprehensive solutions to serve the needs of engineers designing PCI Express silicon and embedded systems as well as those validating the physical-layer compliance of PCI Express devices to the PCI Express Compliance Test Specification. PCE3 includes Gen1/2/3 Compliance Testing and Electrical Validation for:
- Root Complex
- Endpoints
- Switches
- Bridges
- Add-In Cards
- System Boards
- Embedded Systems
- Express Module
Tektronix PCE3 application provides the most comprehensive solution for PCI Express Gen1/2/3 Transmitter compliance testing as well as debug and validation of PCI Express devices against the specifications. The PCE3 application includes a TekExpress™ compliance automation solution that integrates SIGTEST from PCI-SIG as well as DPOJET-based PCI Express Jitter and Eye Diagram analysis tools for debug purposes all in a single software package.
The PCE3 application is compatible with Tektronix DPO/DSA/MSO70000 series oscilloscopes that are designed to meet the challenges of the next generation of serial data standards such as PCI Express. These oscilloscopes provide the industry's leading vertical noise performance with the highest number of effective bits (ENOB) and flattest frequency response among oscilloscopes in their class. Tektronix DPO/DSA/MSO 70000 series of oscilloscopes have been approved by PCI-SIG for compliance testing.
Compliance Testing
The PCI-SIG provides PCI Express compliance tests for testing PCI Express systems and add-in cards. For a PCI Express system or a device to be placed on the Integrators List, the system or device must pass interoperability and compliance testing. For electrical validation PCI-SIG uses SIGTEST Post Capture Analysis Software that uses acquisition from an oscilloscope to perform the analysis. Manually capturing the required waveforms and analyzing them is tedious, time consuming and error prone.
The TekExpress Automation for PCI Express Transmitter Compliance greatly reduces the effort and accelerates the compliance testing for PCI Express systems and devices with several unique and innovative capabilities.
TekExpress Automation software can control the DUT using a Tektronix AFG and automatically cycle it through the various speeds, de-emphasis and Presets that are necessary for the compliance test. This eliminates the error-prone manual push button approach that is normally used for DUT control.
A complete test run requires tens of waveforms to be acquired at different DUT settings. This will increase several folds depending on the number of lanes that need to be analyzed. The ability to manage and store the required data for analysis and future reference is an important criterion for any compliance solution. The TekExpress automation software, apart from adjusting the horizontal and vertical settings as well as the acquisition depth for optimal signal quality for accurate analysis, also makes managing the multiple waveforms acquired for analysis easy. The SIGTEST DLL is integrated into the solution and is used to analyze the acquired waveforms. This make results of the analysis consistent with the SIGTEST post capture analysis software that is used at PCI-SIG workshops for compliance.

TekExpress PCIe test selection for compliance analysis
The TekExpress automation software also provides flexibility in selecting the data rates, voltage swing, presets and the tests to run, it also provides the option to de-embed the effects of the channel and the text fixtures and provide an accurate representation of the signal at the pins as required by the specification.

TekExpress PCIe compliance analysis report generation
All the analysis results are compiled in an html-format report that can include pass/fail summary, eye diagrams, setup configuration, and user comments. The contents of the report can be customized to include information of interest such as append results and custom report generation based on test name/pass fail/equalization.
Debug and Validation
If a DUT or Add-In card fails compliance, the PCE3 application includes a DPOJET-based debug and analysis toolkit that is customized for debug and validation of PCI Express interfaces.

PCE3 base specification measurement suite

PCE3 CEM measurement analysis before channel, after channel, after CTLE, and DFE
The new jitter measurements introduced with PCIe Gen3 provide separate limits for data dependent (DDJ) and uncorrelated deterministic jitter (UDJDD). It is important to separate DDJ (which can be compensated with transmitter and receiver equalization) and UDJDD (which can be caused by effects such as crosstalk and power supply noise).
Apart from the above Jitter measurements Pulse Width Jitter (PWJ) is a new measurement that addresses the increased channel loss at 8 Gb/s. The purpose of the PWJ measurement is to ensure that lone bits meet minimum pulse width requirements. All new jitter measurement implement Q-scale extrapolation as defined in the base specification. PCE3 provides the complete set of PCI Express 3.0 jitter measurements enabling silicon designers to verify that their silicon meets the base specification requirements.
Furthermore, the base specification requirements are defined at the pins of the transmitter. Before the measurements are computed the test channel must be de-embedded. De-embed filters can be easily created using Serial Data Link Analysis software (SDLA) and then quickly entered into the PCE3 base specification measurement setup and saved for future use. In addition to jitter, PCE3 also provides voltage, package loss, and transmitter equalization measurements.
PCE3 leverages the channel modeling and receiver equalization functionality of SDLA to support CEM measurements. Unlike other solutions, PCE3 provides full visibility to the signal as it has been modified to embed the compliance channel and provide receiver equalization. Eye diagrams and measurements can be set up to visually see the results of channel embedding, CTLE application, and DFE. For example when determining the optimal RX Equalization settings (CTLE setting and DFE tap value) the resulting eye diagrams and measurements show the effects of post processing on the acquired signal. Compliance measurements can then be taken on the waveform.
PCI Express Serial Triggering and Analysis (SR-PCIe)

PCIe Gen 3 compliance pattern decoded with SR-PCIe
Decode and Display of PCIe data in a protocol-aware view with the characters and names that are familiar from the standard such as the ordered sets: SKP, Electrical Idle, and EIEOS. A time correlated event table view with waveform allows for quickly searching through events of interest simultaneously. The PCIe data stream is integrated with serial bus trigger and search for PCIe gen 1 and 2 allows for triggering on information of interest.
Comprehensive Measurements for PCIe Validation, Debug, and Precompliance
Option PCE3 provides measurements that span multiple test points and versions of the PCIe specification. All PCIe specifications, test points, and measurements supported are listed in the following sections.
Option PCE3 Provides Coverage for a Broad Set of PCIe Specifications and Test Points
Test Method | Spec Revision | PCI Express Specification Title | Test Points Defined |
|---|
Rev 1.1 | Rev 1.1 | Base Specification | Transmitter and Receiver |
Rev 1.1 | CEM Specification | System and Add-in Card Reference Clock |
Rev 1.0 | Express Module Specification | Transmitter Path and System Board |
Rev 1.0 | PCMCIA Express Card Standard | Host System Transmitter Express Card Transmitter |
Ver. 3.0 Rev 1.1 | Mobile PCI Express Module (MXM) Electromechanical Specification | PCI Express |
Rev 2.0 | Rev 1.0 | External Cabling Specification | Transmitter and Receiver Path |
Rev 2.0 | Base Specification | Transmitter and Receiver Mobile Low-power Transmitter |
Rev 2.0 | CEM Specification | System and Add-in Card (3.5 and 6 dB de-emphasis) |
Ver. 3.0 Rev 1.1 | Mobile PCI Express Module (MXM) Electromechanical Specification | PCI Express |
Rev 3.0 | Rev 1.0 | Base Specification | Transmitter |
Rev 0.7 | CEM Specification | System and Add-in Card |