DCSIMG

DesignInsight '09 Agenda

Time Agenda
8:30 - 9:00 Registration
9:00 - 9:15 Opening/Welcome Speech
9:15 - 10:15 DDR2 and DDR3 Proper Verification Approaches
10:15 - 10:45 Coffee Break
10:45 - Noon Mixed Signal Debugging Workshop
Noon - 1:30 Luncheon & Industry Panel
10 Gb/s Signaling - Methods for Real-Time Characterization
1:30 - 2:30 Compliance and Validation of SuperSpeed USB/PCIe Gen 3
2:30 - 2:45 Coffee Break
2:45 - 4:00 Compliance and Validation of Storage Technologies (SAS2, SATA 6 Gb/s)
4:00 - 4:30 Contest Drawing and Wrap-Up

Event Partner

Altera Logo

DesignInsight Seminar Logo

沪ICP备05012376号