Tektronix Embedded Instrumentation provides a suite of software and RTL-based embedded instruments for debugging ASIC prototypes with Certus and ASIC or System-on-Chip (SoC) designs with Clarus. With the increased integration of semiconductors, more and more instrumentation is going on-chip. Certus and Clarus greatly improve your debug productivity, accelerating time-to-market by providing state-of-the-art advancements for in-silicon debug that scales with the complexity of design.
Our solution is led by Certus for ASIC prototyping. Certus 2.0 fundamentally changes the ASIC prototyping flow by enabling full RTL-level visibility and making FPGA internal visibility a feature of the prototyping platform. This simulation-level visibility allows engineers to diagnose multiple defects in a day versus a week or more with existing tools. Once your ASIC prototype is in place, users can then leverage the same advanced embedded instrumentation technology in the ASIC or SoC design flow with Clarus.
Certus Whitepaper: New! Whitepaper: Break Through Your ASIC Prototyping Bottlenecks
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Each of these solutions enable the validation of correct operation and the determination of the root cause of design issues faster in a unified and productive environment. This approach enables the user to control in-silicon instruments with a very high level of efficiency and automatically document the result.
A solution for SoC and ASIC prototypes that span multiple FPGA devices with the requirement to gain visibility across multiple devices for a prototype-wide view of the design behavior.
A solution for the SoC and ASIC designers who need efficient on-chip instrumentation and a methodology to insert those instruments minimizing die area while maximizing visibility.