Digital Pre-emphasis Processor Datasheet

Features & benefits

• 1 to 12.5 Gb/s for Support of Hardware-based Equalization of 2nd- and 3rd-generation Serial Standards
• 3- or 4-tap for Full Support of Compliance Testing for 802.3ap, Serial Attached SCSI, 10GBASE-KR Backplanes, DisplayPort™, USB 3.0 PCI Express^® Gen3
• Pre-cursor or Post-cursor Adjustment for Optimizing Compensation for ISI and Loss
• Exceptionally Easy Setup with Concurrent Multiple Domain Views Ideal for Operation as a Stand-alone Instrument Controlled by a Remote PC, or with a BERTScope for Complete Software Integration
• Precise Control to Correct for Effects such as Backplane ISI or Optical Effects with Adjustability through Tap Weights or Step Response provides the Flexibility Needed for Complete Design Characterization
• Optional integrated reference clock multiplication to PCIe compliant 2.5 GHz, 5 GHz, and 8 GHz
• Optional integrated eye opener functionality for testing DUTs with long channels
• Optional integrated clock doubler that enables full rate stress for 12 Gb/s SAS
• BERTScope Clock/Data delay compensated internally to allow length-matched matched cables
• Enclosure with the BERTScope footprint to allow equipment stacking
• New microcontroller to provide more processing power
• RS-232 interface enhancement to speed up PCIe receiver equalization link training
• Software to accommodate channel de-embedding and ISI fine adjustments

Applications

• Design Characterization for High-speed, Sophisticated Designs
• Certification Testing of Serial Data Streams for Industry Standards
• Design/Verification of High-speed I/O Components and Systems

Example functional block diagram (3-Tap shown).

The DPP125C is a nonlinear signal conditioner capable of adding controllable amounts of pre-emphasis to a signal. It takes in single-ended inputs of data and clock.

Intuitive control with many views

Intuitive user interface gives multiple views of the output waveform.

The wave shape can be adjusted in the user interface by either directly entering tap weights, or through an amplitude-weighted time domain bitmap showing the step response. In addition to these two views, a frequency-domain Bode plot is calculated and displayed to show the effect being implemented. This is particularly helpful when counteracting the effects of circuit board ISI with a measured frequency response.

Adjustable output

Output amplitude is user adjustable in amplitude and offset, and is offered differentially.

De-emphasized signal with sinusoidal jitter from a BERTScope.


The BERTScope DPP Series can operate as a stand-alone instruments controlled by a PC, or with a BERTScope for complete software integration. It can be fully automated, and with its compact size, it will easily fit into a manufacturing environment.