DDR/Memory

Videos

• Advanced Methods for DDR Verification and Debug Webinar
  Tektronix has recently introduced testing tool updates that simplify debugging steps to hasten important electrical verification testing. This webinar includes tips on improving signal access to DRAM's, information on how to separate read & write bursts for faster verification and more important topics. Speaker: Randy White. 24 minutes.
• Simplifying Xilinx and Altera FPGA Debug Webinar
  In this webinar you will learn How choosing the right FPGA debug methodology can reduce debug and validation time, The advantages and disadvantages of test equipment alternates and more...

• View All Embedded Systems Videos

  These videos will help you understand the tools and methodologies for solving embedded systems design challenges.

Application Notes

• DDR Technology Fact Sheet
  Tektronix provides a powerful and comprehensive test instrument portfolio for SDRAMs, memory controllers, advanced memory buffers, DIMMs, computer motherboards and embedded systems up to DDR3-1867 speeds and beyond.

• Electrical Verification of DDR Memory
  With the ever increasing DDR SDRAM Clock Frequencies and Signal Edge Rates, signal integrity and bus state verification techniques are increasingly important for DDR Memory design success. This application note focuses on techniques for triggering and decode of the command bus and isolating read/write signals, as well as on a variety of memory signal integrity measurements.
• SDRAM Memory Systems: Embedded Test & Measurement Challenges
  This DRAM memory primer provides an overview of DRAM concepts, presents potential future DRAM developments and offers an overview for memory design improvement through verification.
• Quick Signal Integrity Troubleshooting with Integrated Logic Analyzers & Oscilloscopes
  Fast product development requires fast and efficient troubleshooting of signal integrity problems. Signal integrity is a growing priority as digital system designers pursue ever-higher clock and data rates...
• An Introduction to Clock Recovery: Critical Aspects in Test and Measurements in High-speed Serial Designs
  A primer on clock recovery, dealing with high-speed serial data rates doubling and tripling.
• Command & Protocol Verification of DDR, DDR2, and DDR3 SDRAM
  Computer memories are not the only systems that continue to demand larger, faster, lower powered and physically smaller memories. Embedded systems applications have similar requirements. This application note highlights the power of the logic analyzer in verifying DDR2 SDRAM commands and protocols.

• View All