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Compliance Testing for DVI Transmitter (at TP2)

The transmitter testing compliance to DVI specifications involves various tests such as:

DVI Transmitter Eye Test

Eye test is extremely important and passing the eye-test ensures the developer of a robust design. Eye test is important as it predicts the signal behavior for the following aspects:

Follow these steps to perform eye measurement:

  1. Connect the display monitor to the DVI transmitter card
  2. Load the half clock pattern and/or pseudo random pattern using .bmp files and make the display window as full screen
  3. Remove the DVI display and connect the TPA-P fixture to the transmitter as shown in Fig. 4

    Fig. 4
  4. Connect the P7330 probe to the desired data channel (for example Rx 0 -/+)
  5. Connect the recovered or transmitted clock (as appropriate for your design) using an SMA cable or a differential probe, respectively, as the trigger source to the oscilloscope
  6. Use TDSDVI for performing eye measurement (Fig. 5) and see the results
  7. Use the report generator feature to generate reports for the eye measurement

Fig. 5

Jitter

  1. Connect equipment as per the above set up shown in Fig. 4
  2. Connect the transmitter (differential) clock and the recovered clock as the trigger source
  3. Select the jitter measurement and configure TDSDVI
  4. Run the application. TDSDVI provides the peak-to-peak jitter and a Pass or Fail after comparing the result with the DDWG specification

Skew

  1. Connect the display monitor to the DVI transmitter card
  2. Load the half clock pattern using .bmp files and make the display window as full screen
  3. Connect two single ended probes to the selected pair
  4. Select the test in TDSDVI and press run button
  5. TDSDVI provides the skew value and a Pass or Fail after comparing the result with the DDWG specification
  1. Connect two single ended probes to the different polarities of different cable pairs
  2. Select the test in TDSDVI and press run button
  3. TDSDVI provides the skew value and a Pass or Fail after comparing the result with the DDWG specification